Advanced Topics

Examples

In both load multiple and store multiple instructions, the base address register can be altered as part of the instruction. This is accomplished by appending an "!" to the base register.

LDMIA r1!, {r2 - r4} ; value in r1 is the base address
    ; set r2 equal to value at base address
    ; increment value in r1
    ; set r3 equal to value at new base address
    ; increment value in r1
    ; set r4 equal to value at new base address
    ; increment value in r1
    ; r1 is now r1+12

LDMIA stands for LoaD Multiple Increment After, where the base address register is incremented after it has been used.

The ARM has four possible options for multiple loads and stores:

    • Increment After - LDMIA and STMIA
    • Increment Before - LDMDB and STMDB
    • Decrement Before - LDMIB and STMIB
    • Decrement After - LDMDA and STMDA

Comparison of Store Multiple Loads

Comparison of Store Multiple Loads